Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems by Xinpeng Xing Peng Zhu & Georges Gielen

Author:Xinpeng Xing, Peng Zhu & Georges Gielen
Language: eng
Format: epub
Publisher: Springer International Publishing, Cham

(4.3)

If the clock of the VCO-based quantizer is not clean enough, it introduces an error in the quantization through two mechanisms: the sampling uncertainty triggered by pulse delay jitter and the integration error caused by pulse width jitter. The sampling error in the VCO-based quantizer is the same as in conventional ADCs:

(4.4)

Here is the pulse delay jitter variance and is the input signal frequency. If the variance of the pulse width jitter is , then the quantizer performance is:

(4.5)

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